Employing Interpolation to Enable Higher Order Fuzzy Logic Controllers on Resource Constrained Embedded Devices

It has been shown recently that higher order Fuzzy Logic Controllers (FLCs) such as type2 FLCs have the potential to outperform type1 FLCs. However, the high computational cost associated with such higher order FLCs is still impeding their widespread use in real world applications where the computational and memory resources are limited. In this paper we will present a simple framework that allows to tie together the advantages of using higher order FLCs while keeping computational costs at a minimum. The proposed technique is based on the offline computation of high-quality control surfaces which are sparsely sampled and reproduced through interpolation on the actual embedded device. The proposed technique will be described in detail and we will present some example applications and results achieved using the proposed system.